Regulator circuit having a multi-stepped regulating wave

ABSTRACT

A circuit for providing a regulated a-c or d-c output voltage from an unregulated a-c input voltage. A series regulating network is disposed between the regulator input and the regulator output to support the difference between the unregulated input voltage and the regulated output voltage. A shunt regulating network is connected between the series regulating network and the regulator output to generate a plurality of regulating waves which, together with the input voltage, control the current through and voltage across the series regulating network. Output voltage sensing circuitry controls the phase angle between the input voltage and the regulating waves, as required, to establish and maintain the regulated output voltage.

United States Patent 1 Brown 1 1 3,745,437 July 10, 1973 [75] Inventor:

[73] Assignee: Lorain Products Corporation,

Lorain, Ohio 22 Filed: May 18, 1972 21 Appl. No.: 254,697

Harold J. Brown, Lorain, Ohio 321/DlG. l, 5 A; 323/106, 110, 119, 102,124, 128, 34-37, 8; 307/105 [56] References Cited UNITED STATES PATENTS3,450,983 6/1969 Koppelmann et a1 323/119 3,584,286 6/1971Randall.....-. 321/5 3,582,756 6/1971 McMurray.....

6/1964 Krezek .1 323/102 l/197l Dewey ..307/105 Primary Examiner-GeraldGoldberg Att0rneyJohn Howard Smith [57] ABSTRACT A circuit for providinga regulated a-c or d-c output voltage from an unregulated a-c inputvoltage A series regulating network is disposed between the regulatorinput and the regulator output to support the difference between theunregulated input voltage and the regulated output voltage. A shuntregulating network is connected between the series regulating networkand the regulator output to generate a plurality of regulating waveswhich, together with the input voltage, control the current through andvoltage across the series regulating network. Output voltage sensingcircuitry controls the phase angle between the input voltage and theregulating waves, as required, to establish and maintain the regulatedoutput voltage.

3,041,523 6/1962 Kuba 321/9 R X 13 Claims, 10 Drawing Figures A W "fi aal, l4 33 J i i2 22 23 Q24 29 my N 328,]: I68}: 325 :ER 7! lec 32c 8' 1W, ea l I. 25 2e 27 I5 310 3lb 31c 2F my, l7b1-0 17c IO F 5011/ I7 v.co. l SIGNAL K TRANSLATING i CIRCUIT 53 3 1 l i l l 47 l l l l lREGULATOR CIRCUIT HAVING A MULTI-STEPPED REGULATING WAVE BACKGROUND OFTHE INVENTION The present invention relates to voltage regulatingcircuits and is directed more particularly to regulating circuitswherein wave generating circuitry controls the voltage across andcurrent through an inductor to maintain a substantially constant voltageat the regulator output.

Voltage regulator circuits utilizing series-connected inductors inconnection with shunt-connected wave generating circuits have long beenknown and used for the purpose of providing a substantially constantoutput voltage from a variable a-c input voltage. Early forms of suchregulator circuits were known as ferroresonant regulators and utilizedwave generating circuits including capacitors and saturable coremagnetic units. Such concepts are shown, for example, in US. Pat. No.2,143,745 granted to J. G. Sola on Jan. 10, 1939 and US. Pat. No.2,377,152 granted to H. M. Huge on May 29, 1945, which show respectivesinglephase and three-phase ferroresonant voltage regulators.

Because of the excessive weight and audible noise associated with theabove saturable magnetic units and because of the difficulty ofobtaining an output waveform of satisfactory harmonic content, mucheffort has been expended in attempting to improve ferroresonant typeregulators. One attempt has involved the substitution of a plurality ofseries-connected, saturable core magnetic devices for each magnetic unitof circuits such as those of Huge and Sola. Such concepts are shown, forexample, in US. Pat. No. 3,092,768 granted to A. Kusko on June 4, 1963and US. Pat. No. 3,139,577 granted to D. Krezek on June 30, 1964. Incircuits of the latter type seriesconnected magnetic devices saturate ina predetermined sequence to generate a waveform which is approximatelysinusoidal. While circuitry of this type does provide a waveform ofsatisfactory harmonic content, it does not solve the problem ofexcessive circuit complexity, weight and audible noise.

AnOther attempt to improve ferroresonant voltage regulators has involvedthe substitution of gate controlled switching devices and linearinductances for the saturating magnetic units. Such concepts are shown,for example, in (1.8. Pat. No. 3,076,924 granted to E. W. Manteuffel onFeb. 5, 1963. In such circuits, the linear inductance simulated thesaturated impedance of the saturable magnetic unit and the gatecontrolled switching devices simulated the on-off conductingcharacteristic thereof. While the utilization of solidstate circuitrydid greatly reduce the weight and noise associated with ferroresonanttype voltage regulators, it did not solve the problem of high harmoniccontent. In addition, solid-state versions of earlier ferroresonantvoltage regulators did not lend themselves to use in true three-phasevoltage regulators. As a result, solid-state polyphase regulatorcircuits were produced by the uneconomical expedient of couplingtogether a plurality of single phase regulator circuits.

The above problems and limitations are eliminated by the instantinvention which presents novel circuitry that affords any desired degreeof waveshaping and that is usable in true polyphase voltage regulatorsystems and thus does not comprise a mere additive use of sin' gle phasecircuitry.

SUMMARY OF THE INVENTION It is an object of the invention to provideimproved voltage regulating circuitry.

Another object of the invention is to provide voltage regulatingcircuitry including a shunt-connected wave generating circuit whichgenerates a regulating voltage wave of controlled harmonic content.

It is still another object of the invention to provide voltageregulating circuitry of the above character which does not incorporatethe disadvantages accompanying the use of saturable magnetic devicessuch as vibrations and audible noise.

Yet another object of the invention is to provide a voltage regulatingcircuit of the above character which generates a voltage wave of lowharmonic content without serially adding a plurality of componentvoltage waves. 1

Another object of the invention is to provide a voltage regulatingcircuit including a wave generating circuit wherein wave generationresults from the action of solid state switching devices on a pluralityof cooperating electrical storage elements such as capacitOl'S.

It is another object of the invention to provide a voltage regulatingcircuit of the above character in which the number of inductors in thewave generating circuit is less than or equal to the number of phases ofthe a-c input.

Another object of the invention is to provide a voltage regulatingcircuit in which the solid state switching devices are not exposed toexcessive rates of change of voltage.

It is another object of the invention to provide a voltage regulatingcircuit including a shunt-connected wave generating circuit having oneor more regulating terminals and including improved voltage controlcircuitry for changing the voltage at the regulating terminals in apredetermined sequence.

Still another object of the invention is to provide a voltage regulatorof the above character wherein the voltage control circuitry includes aplurality of charge storage elements such as capacitors and chargecontrol circuitry for changing the level of charge on the charge storageelements in a predetermined, stepped sequence.

Yet another object of the invention is to provide charge controlcircuitry which changes the level of charge on the capacitors byshifting all or part of" the charge on one or morecapacitors to one ormore other capacitors, these changes in the level of charge comprisingat least three steps per half-cycle.

Another object of the invention is to provide voltage regulatingcircuitry which, when used to provide a regulated d-c voltage, includescharge control circuitry that allows charge to be shifted between thecharge storage elements within a relatively short time such as, forexample, 1 percent of the period of each regulating wave.

It is stillanother object of the invention to provide voltage regulatingcircuitry of the above character including voltage control circuitry forcontrolling the timing of the above charge control circuitry inaccordance with the magnitude of the voltage to be regu lat'ed.

DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic diagram of oneexemplary circuit embodying the invention.

FIGS. 2a, 2b and 20 show the voltages appearing at selected points inthe circuit of FIG. 1 as a function of time.

FIG. 3 is a timing diagram showing the conductive states of selectedcircuit elements off FIG. 1.

FIG. 4 is a schematic diagram of a second exemplary circuit embodyingthe invention.

FIGS. 5a, 5b and 5c show the voltages appearing at selected points inthe circuit of FIG. 4 as a function of time.

FIG. 6 is a timing diagram showing the conductive states of selectedcircuit elements of FIG. 4.

DESCRIPTION OF THE INVENTION Referring to FIG. 1 there is shown voltageregulating circuitry 10 for producing a regulated voltage at theterminals 11 and 12 of a d-c load 13 from the unregulated voltage whicha polyphase source 14 establishes at terminals A, B and C. Regulatingcircuit 10 includes aseries regulating network 15 for supporting thedifference between the unregulated a-c input voltage and the regulatedoutput voltage. Regulating network 15 may include inductance means 16A,16B and 16C which may, for instance, comprise separate windings on asingle magnetic core. Regulating circuit 10 also includes a shuntregulating network 17 for controlling the voltage across and currentthrough series regulating network 15, as required, to establish thedesired output voltage at the required output current. Finally,regulating circuit 10 includes rectifying means which here takes theform of a three-phase rectifying bridge 21 including diodes 22, 23, 24,25, 26 and 27 and a capacitor 29. It will be understood that if an a-coutput voltage is required, rectifying circuit 21 and capacitor 29 maybe eliminated and the desired output voltage and current may be drawnfrom terminals A, B and C.

Shunt regulating network 17 controls the regulating activity ofregulating inductors 16A, 16B and 16C by generating a set of regulatingwaves on regulating terminals 17a, 17b and 170. These regulating wavesare applied to first respective ends of inductors 16A, 16B and 16Cthrough conductors 31a, 31b and 310. Since the polyphase input voltagesof source 14 are applied to second respective ends of inductors 16A, 16Band 16C through conductors 33A, 33B and 33C, respectively, the voltageacross and current through the regulating inductors is dependent uponthe phase difference between the a-c input voltages generated by source14 and the regulating voltage waves generated by shunt regulatingnetwork 17. Consequently, as will be described more fully presently,controlling the phase angle between the regulating voltages on terminals17a, 17b and 17c and the a-c input voltage on terminals A, B and C,controls the voltage between d-c output terminals 11 and 12 (or a-coutput terminals A, B and C).

In the present embodiment, the energy which regulating network 17requires to generate regulating waves at terminals 17a, 17b and 170 isdrawn from the voltages between a c conductors 32A, 32B and 32C throughconductors 31a, 31b and 310. The flow of energy into network 17 ismanifested by the flow of charging current into a plurality of chargestorage means which here take the form of capacitors 35ab, 35bc and350a. The latter capacitors are connected in delta between junctions a,b and c which are, in turn, connected to regulating terminals 17a, 17band 17c. It will be understood that junctions a, b and c may beconnected to polyphase line conductors 32A, 32B and 32C through thewindings of any suitable transformer. One particularly suitabletransformer configuration is a three-phase transformer havingWye-connected windings connected between junctions a, b and c.

As is well known, the sizes and weights of inductors and transformersare dependent upon the peak amplitudes and the waveforms of the voltagesapplied thereto. An inductor to which is applied a voltage waveformhaving a multiplicity of steps during each half-cycle thereof as, forexample, is shown in FIG. 2a, can be made smaller than an inductor towhich is applied a squarewave voltage waveform although the fun damentalcomponent of the squarewave may be equal to the fundamental component ofthe multi-stepped waveform. Accordingly, it will be seen that the moreclosely the steps in the voltages at terminals 17a, 17b and allow theregulating waves to approach a sinusoidal waveform, the more closely thesizes and weights of regulating inductors 16A, 16B and 16C will approach their minimum values. This is equally true of transformers whichmay be utilized to couple networks 17 or 21 to conductors 32A, 32B and32C.

The term multi-stepped waveform, as used herein, means a waveform eachhalf-cycle of which comprises a series of discrete voltage steps, therelative magnitudes of the steps being so arranged that they approximateor follow the contour of the desired waveform, in the present instance,a sinusoidal waveform. For general a-c power applications, the number ofvoltage steps during a half-cycle will be three or more and will be anodd number. This is because the utilization of an odd number less thanthree (one) results in a squarewave, that is, in a waveform which hasexcessive harmonic content and is, therefore, unsuitable for use incircuitry of FIG. 1. This is also because an even number of stepsnecessarily result in a waveform which is unsymmetrical about themid-point of the half-cycle and, therefore, includes unnecessary andundesirable har monic components. It will be understood, of course, thatas the number of steps becomes larger than three, the effect of theunsymmetry resulting from the utilization of an even number of stepsbecomes smaller and may in appropriate circumstances be neglected. Thus,a multi-stepped waveform is preferably but not necessarily a waveformhaving an odd multiplicity of steps in each half-cycle.

Accordingly, from the foregoing it will be seen that, as one aspect ofthe invention, highly advantageous results will be attained by the useof a multiplicity of voltage steps per half-cycle.

To the end that the harmonic content of the regulat ing voltage wavesmay be limited or controlled, regulating network 17 includes chargecontrol circuitry which here takes the form of a single inductor 37 andcontrollable switching means 40 through 45 here shown as suitablethyristors. This charge control circuitry con trols the waveform of theregulating voltage waves by shifting or redistributing charge amongcapacitors 35ac, 35bc and 3500 in a predetermined or programmedsequence, the latter sequence being so arranged that the voltagesappearing between junctions a, b and c have multi-stepped waveforms, inthe present instance the waveforms shown in FIGS. 2a, 2b and 2c. Thecharge control circuitry also allows the times at which charge shiftingoccurs to be advanced or retarded with respect to the polyphase a-cinput voltage. Thus, the charge control circuitry of FIG. 1 not onlyaffords regulating waves of controlled harmonic content but also affordsregulating waves which may be shifted in phase with respect to the a-cinput voltage.

The manner in which the charge control circuitry of regulating network17 operates will now be described. Referring to FIGS. 2a, 2b and 20, itwill be seen that at an arbitrarily assumed starting time T the voltageacross capacitor 35ab has a positive value of E, that is, that thecharge on capacitor 35ab is such that terminal b is positive fromterminal a by a voltage E. Similarly, the voltages across capacitors35bc and 35m have negative values of E/2. These conditions exist byvirtue of previous switching activity.

The above conditions continue until time T when thyristors 40 and 43 arefired to convert the charge pattern which is responsible for thevoltages shown during time interval T -T to the charge pattern whichwill establish the voltages shown during time interval T -T Theconversion takes place as capacitor 3512c resonantly discharges andrecharges to the opposite polarity through the path including thyristor40, inductor 37 and thyristor 43. In the course of this activity,thyristors 40 and 43 serve to initiate resonant discharging at the timewhen firing signals are applied to gates 40g and 43g thereof and serveto terminate resonant discharging at the time when the current throughinductor 37 drops to zero.

During the above described resonant discharging of capacitor 35bc,capacitor 3541b transfers a portion of its stored charge to capacitor350a. This occurs because capacitors 35ab, 35bc and 35m are connected ina closed current conducting path around which the sum of the voltagesmust be equal to 0. Consequently, the firing of thyristors 40 and 43 attime T, and the resultant reversal in the polarity of the voltage acrosscapacitor 35bc causes a simultaneous change in the level of charge oncapacitors 35ab and 350a.

Similarly, the firing of thyristor pairs 40-45, 45-42, 42-41, 41-44 and44-43 at times T T T T and T respectively, as shown in FIG. 3, causefurther redistributions of charge among charge storage capacitors 35ab,35bc and 35m to generate the remaining steps of the waveforms shown inFIGS. 2b and 20. After time T the distrubtion of charge in capacitors35ab, 35bc and 350a is the same as that which existed at time TAccordingly, it will be seen that a periodic repetition of the thyristorfiring pattern shown in FIG. 3 will cause a periodic repetition of theabove described cycle of wave generating activity.

Because switching devices 40 through 45 each direct discharge currentflow through inductor 37, it will be seen that shunt regulating network17 affords the desired wave generating activity with only one magneticunit. This represents a reduction in the number of magnetic units fromthe number which has heretofore been necessary in any type of polyphaseregulator. Thus, the circuit of FIG. 1 not only provides waveshapingactivity not found in previously available regulator circuits butprovides such activity with circuitry of reduced size and complexity.

Because, in addition, the above described resonant discharge currentsflow through pairs of thyristors connected in the manner shown and flowthrough inductor 37 in one direction, the voltage snap" produced by inductqr 37 as current therein terminates is always of the same polarityand is borne by pairs of series-connected thyristors rather than by asingle thyristor. As a result, the thyristor arrangement of FIG. 1 isless subject to false or unintended thyristor firings than previouslyavailable regulator circuits utilizing thyristors.

Upon the initial application of power to input terminals A, B and C, asubstantial in-phase component of current flows into regulating network17 to charge capacitors 35ab, 35bc and 35m to the value necessary toinitiate voltage regulating activity. Thereafter, regulating network 17draws only negligible real power from the polyphase a-c input becausethe exchange of energy between capacitors 350b, 35bc and 35m takes placeunder virtually lossless conditions through inductor 37 and switchingdevices 40 through 45. Thus, after turn on, regulating network 17 drawsonly a relatively small in-phase current through conductors 31a, 31b and310.

The phase displacement between the regulating waves and the inputvoltage does, however, allow regulating network 17 to draw, throughinductors 16A, 16B and 16C, sufficient quadrature or reactive current toinduce across those inductors a voltage equal to the difference betweenthe unregulated input voltage and the desired output voltage. Thus, thelatter inductors serve as an active part of the regulating scheme andnot merely as, for instance, filter elements. The above quadraturecurrent flows principally in capacitors 350b, 35bc and 350a which may beselected to have capacitance values large enough to prevent thequadrature current from significantly altering the capacitor voltagewaveforms. Thus, regulating network 17 controls the difference betweenthe input and output voltages without significant expenditure of realpower.

In addition to generating the quadrature current which regulates theoutput voltage with respect to the input voltage, network 17 alsocontrols the flow of inphase current from source 14 to assure that load13 is provided with the required current. This control of inphasecurrent flow is accomplished by the same circuit activity which controlsthe output voltage, namely: varying the phase angle between theregulating waves and the input voltage. This is possible because eachvalue of input voltage and output current within the regulating range ofregulator 10 has associated with it a regulating wave-input voltagephase angle at which the quadrature current flowing through seriesregulating network 15 into shunt regulating network 17 will establishthe desired output voltage and at which the level of in-phase currentthrough series regulating network 15 will supply the desired loadcurrent. Thus, by controlling the firing times of thyristors 40 through45, the output voltage can be maintained at the desired value in spiteof changes in input voltage and output current.

To the end that the firing times of thyristors 40 through 45 may becontrolled inthe manner described above, there is provided controlsignal generating circuitry 47 which in the present embodiment includesa voltage controlled oscillator 48 and a signal translating circuit 49.Oscillator 48 senses the d-c output voltage through sensing leads 50 and51 and provides, in the well-known manner, a pulse train of variablefrequency on conductors 52 and 53, the latter pulse train having afrequency which is a whole-number multiple of the a-c input voltagefrequency when the output voltage is at the desired value and whichvaries in either direction from that frequency as the output voltagevaries in either direction from the desired value.

The above multiple is preferably equal to the number of steps which areto appear in a half-cycle of each regulating wave. In FIG. 1, forexample, a half-cycle of each regulating wave consists of three discretevoltage steps (these steps being counted during one-half cycle of thevoltage waveform, that is, from the zero voltage point Z on the waveformto the next zero voltage point Z of the waveform) and the quiescentoutput frequency of oscillator 48 should, therefore, be equal to threetimes the a-c input voltage frequency. It will, however, be understoodthat oscillator 48 may be made to operate at multiples of the inputfrequency which are greater than three if the number of dischargeinductors and thyristors are increased to afford the charge controlpaths necessary to afford more than three voltage steps per half-cycleof each regulating wave.

Signal translating circuit 49 serves to apply firing signals tothyristors 40 through 45, in the sequence shown in FIG. 3, at arepetition rate determined by the frequncy of the output pulse train ofoscillator 48. To this end, signal translating circuit 49 may consist ofany suitable frequency dividing or counter circuits of types well-knownto those skilled in the art.

The manner in which control signal generating means 47 controls theregulating waves at terminals 17a, 17b and 170 to produce a regulatedoutput voltage will now be described. Assuming for a given a-c inputvoltage and a given d-c output current, that the phase angle between theregulating waves and the polyphase input voltage is such as to establishthe desired output voltage at the required output current, oscillator 48will apply to conductors 52 and 53 a pulse train which has a frequencythree times greater than the polyphase input frequency. Under theseconditions, signal translating circuit 49 causes regulating network 17to generate regulating waves which have a frequency equal to thepolyphase input frequency. Accordingly, the phase angle between thepolyphase input voltage and the regulating waves remains constant, beingmaintained at that phase angle by the constant frequency of theregulating waves generated by network 17. Thus, the circuit of FIG. 1 isin a dynamic equilibrium condition.

If, under the above conditions, the current drawn by load 13 shouldincrease, the output voltage between terminals 11 and 12 will decreaseand thereby lower the frequency of the pulse train on conductors 52 and53. This decrease in frequency, in turn, causes signal translatingcircuit 49 to reduce the frequency of the firing signals applied toswitching devices 40 through 45. The latter decrease causes a decreasein the frequency of the regulating waves with the result that the phaseangle between the regulating waves and the input voltage increases. Thisincreases the in-phase and quadrature currents through regulatinginductors 16A, 16B and 16C until the regulated output voltage isrestored to its original value. Thereafter, the frequency of theregulating waves becomes equal to the a-c input frequency and thecircuit is restored to equilibrium.

If, on the other hand, current drawn by load 13 should decrease, thed-coutput voltage will begin to increase. This increase in outputvoltage increases the frequency of the pulse train generated byoscillator 48 and thereby increases the frequency of the firing signalsapplied to switching devices 40 through 45. This increases the frequencyof the regulating waves and thereby reduces the phase angle between theinput voltage and the regulating waves until the in-phase and quadraturecurrents through regulating inductors 16A, 16B and 16C assume valueswhich restore the desired d-c output voltage. Thereafter, the frequencyof the regulating waves becomes equal to the a-c input frequency and thecircuit is restored to equilibrium.

It will be understood that if, in addition to the above changes inoutput current, the polyphase a-c input voltage should increase ordecrease from the above assumed value, the phase angle between thepolyphase input voltage and the regulating waves will change, asrequired, to compensate both for changes in output current and forchanges in input voltage. Thus, wave generating network 17 together withseries regulating network 15 and variable frequency controller 47provide the desired voltage regulation with respect to input voltage andoutput current.

One advantage of using a voltage-controlled oscillator which, in itsquiescent state, runs at a wholenumber multiple of the a-c inputfrequency, is that increases or decreases in the phase angle between theinput voltage and the regulating waves can be made during the course ofrather than merely at the ends of each half-cycle. If, for example, thed-c output voltage should tend to change during time interval T and T inFIG. 2a, the circuit of the invention will cause corrective action tofirst be felt at time T rather than at the end of the half-cycle aswould be the case if a nonmulti-stepped regulating wave such as asquarewave were used.

Another advantage of the multi-stepped waveforms shown in FIGS. 2a, 2band 2c is that upon rectification by bridge 21, a substantiallyripple-free d-c voltage is produced so long as inductor 37 has aninductance such that the duration of transition times T,, T etc., arekept short in relation to the duration of an input voltage cycle. Suchsubstantially ripple-free voltage may be further smoothed by capacitor29 which also contributes to clamping the amplitude of the regulatingwaves. On the other hand, if regulating circuit 10 is to drive an a-cload, it may be desirable to set the inductance of inductor 37 at avalue such that the duration of transition times T T etc., are not shortin relation to the duration of an input voltage cycle. This is becauseslowing the rate at which capacitors 35ab, 35bc and 35ca resonantlydischarge and recharge rounds the corners of the regulating waves andthereby produces a more nearly sinusoidal output voltage waveform.

In the event that it is desirable for the capacitors of regulatingnetwork 17 to be connected in a star or wye configuration, this may beaccomplished by substituting for regulating network 17 of FIG. 1, theshunt regulating network 17' shown in FIG. 4. The latter circuitincludes capacitors. 35cm, 35bn and 35cn which are connected in a staror wye configuration between junctions a, b and c and neutral n.

Capacitors 35an, 351m and 35cn receive an initial charge from source 14through terminals 17a, 17b and 170. This occurs in the manner describedpreviously in connection with delta-connected capacitors 35ab, 35bc and350a of FIG. 1. To the end that this charge may be redistributed in aprogrammed sequence to generate the desired stepped regulating waves,waveshaping circuit 17' includes charge control circuitry havingresonant discharge inductors 37ab, 37bc and 37ca and having controlledswitching devices 40 through 45', here shown as thyristors. Theseinductors and thyristors control the charge in the capacitors of FIG. 4in substantially the same manner as described previously in connectionwith FIG. 1, except that the capacitors of FIG. 2 exchange charge two ata time rather than three at a time as in the circuit of FIG. 1.

At time T as shown in FIGS. 5a, 5b and 5c, junction a is positive fromneutral n due to presence of stored charge on capacitor 35an, junction bis positive from junction n due to the presence of stored charge oncapacitor 35bn and junction is at the same potential as junction n dueto the absence of stored charge on capacitor 35cn. Upon the applicationof a firing signal to thyristor 42' at time T capacitor 351m transfersits charge to capacitor 35cn by resonantly discharging through the pathincluding capacitor 35cn, inductor 37bc and thyristor 42'. This resonantdischarging terminates as the current through inductor 37bc falls tozero and renders thyristor 42' non-conducting. Thereafter, until time Tthe voltages between junctions a, b and c have the magnitudes andpolarities shown in time interval T T Similar redistributions of charge(and voltage) occur at times T T T T and T when thyristors 41', 44',43', 40' and 45', respectively, are fired. The latter firing patterntogether with the regulating voltage waveforms resulting therefrom areshown in FIGS. 6 and 5, respectively.

Although the capacitor voltage waveforms shown in FIGS. 5a, 5b and 5cdiffer from the capacitor voltage waveforms shown in FIGS. 2a, 2b and20, their effect on the associated series regulating circuitry is thesame. This is because the voltages shown in FIGS. 5a, 5b and 5c areplotted with respect to neutral n in FIG. 4 and because plotting thesesame voltages with respect to terminals 11, b and 0 yields the waveformsshown in FIGS. 2a, 2b and 20. Accordingly, it will be seen thatwaveshaping circuit 17' of FIG. 4 can be substituited for wave-shapingcircuit 17 of FIG. 1 without altering the performance of the circuit ofFIG. 1.

In view of the foregoing, it will be seen that in practicing theinvention, charge which is initially stored on one capacitor istransferred to one or more other capacitors, temporarily stored thereinand recovered and, consequently, that each capacitor serves as a chargestorage device for each other capacitor as charge is shifted fromcapacitor to capacitor to synthesize a regulating voltage wave having acontrollable waveform and frequency.

It will be understood that the embodiments described herein are forillustrative purposes only and may be changed or modified'withoutdeparting from the spirit and scope of the appended claims.

What is claimed is:

I. In a regulating circuit utilizing a regulating wave of controlledharmonic content, in combination, polyphase input means, output means,series regulating means, means for connecting said series regulatingvmeans between said polyphase input meansand said output means, aplurality of charge storage means, means for connecting said storagemeans to one another, means for applying the voltages across saidstorage means to said series regulating means between said seriesregulating means and said output means, a plurality of inductance means,controllable switching means for connecting said inductance means topredetermined ones of said charge storage means to initiateredistributions of charge among said storage means, sensing means forgenerating a signal having a frequency which varies in accordance withthe voltage at said output means and having a quiescent frequency whichis at least three times greater than the frequency of the voltage atsaid input means, signal translating means for applying firing signalsto said controllable conducting means in a predetermined sequence at arepetition rate determined by the frequency of the sig-' nals generatedby said sensing means, means for connecting said sensing means to saidoutput means and means for connecting said signal translating means tosaid sensing means and to said controllable switching means.

2. A regulating circuit as set forth in claim 1 in which said outputmeans includes clamping capacitance means, rectifying means having a-cinput terminals and d-c output terminals, means for connecting said a-cinput terminals to said series regulating means and means for connectingsaid clamping capacitance means across said d-c output terminals.

3. In a regulating circuit utilzing a regulating wave of controlledharmonic content, in combination, a-c input means, output means,regulating inductance means, means for connecting said regulatinginductance means between said a-c input means and said output means, aplurality of capacitors, means for connecting said capacitors to oneanother and in shunt with said regulating inductance means between saidinductance means and said output means, discharge inductance means,controllable switching means, means for connecting said dischargeinductance means and said controllable switching means to saidcapacitors to afford a plurality of selectable resonant current flowpaths therebetween, means for energizing said controllable switchingmeans in a predetermined, periodic sequence to redistribute charge amongsaid capacitors in a multiplicity of discrete steps and means forcontrolling thefrequency of the energization of said controllableswitching means in accordance with the voltage at said output means.

4. A regulating circuit as set forth in claim 3 in which a-d-c voltageis produced at said output means and in which each redistribution ofcharge among said capacitors is made to occur within a time intervalwhich is short in relation to the period of the input voltage.

5. In a regulating circuit utilizing a regulating wave of controlledharmonic content, in combination, a-c input means, output means,regulating inductance means, means for connecting said regulatinginductance means between said a-c input means and said output means, aplurality of capacitors, means for connecting said capacitors in a deltaconfiguration, means for connecting said delta-connected capacitors inshunt with said inductance means between said inductance means and saidoutput means, discharge inductance means, a plurality of controllableswitching means, means for connecting said discharge inductance meansand said switching means to said delta-connected capacitors to initiateand terminate reversals in the polarity of the charge on saidcapacitors, means for energizing said controllable switching means in apredetermined sequence to generate across said delta-connectedcapacitors a plurality of multi-stepped regulating waves, and means foradvancing and retarding the conduction times of said switching means inaccordance with the voltage at said output means.

6. A regulating circuit as set forth in claim in which said output meansincludes clamping capacitance means, rectifying means having a-c inputterminals and dc output terminals, means for connecting said a-c inputterminals to said regulating inductance means and means for connectingsaid clamping capacitance means across said d-c output terminals.

7. A regulating circuit as set forth in claim 6 in which reversals inthe polarity of the charge on said capacitors are made to occur withintime intervals which are short in relation to the period of the a-cinput voltage.

8. A regulating circuit as set forth in claim 5 in which said means forconnecting said delta-connected capacitors in shunt with said inductancemeans includes a transformer having at least one set of Wye-connectedwindings.

9. In a regulating circuit utilizing a regulating wave of controlledharmonic content, in combination, a-c input means, output means,regulating inductance means, means for connecting said regulatinginductance means between said a-c input means and said output means, aplurality of capacitors, means for connecting said capacitors in a starconfiguration, means for connecting said star-connected capacitors inshunt with said inductance means between said inductance means and saidoutput means, discharge inductance means, a plurality of controllableswitching means, means for connecting said discharge inductance meansand said switching means to said capacitors to initiate and terminatethe resonant transfer of charge from a charged capacitor to an unchargedcapacitor, means for energizing said controllable switching means in apredetermined sequence to generate across said star-connected capacitorsa plurality of multi-stepped regulating waves, and means for advancingand retarding the firing times of said controllable switching means inaccordance with the voltage at said output means.

10. A regulating circuit as set forth in claim 9 in which said outputmeans includes clamping capacitance means, rectifying means having a-cinput terminals and d-c output terminals, means for connecting said a-cinput terminals to said regulating inductance means and means forconnecting said clamping capacitance means across said d-c outputterminals.

11. In a regulating circuit utilizing a regulating wave of controlledharmonic content, in combination, a-c input means, output means, aplurality of regulating inductance means, means for connecting saidregulating inductance means between said a-c input means and said outputmeans, a plurality of capacitors, means for connecting said capacitorsto one another in a delta configuration, means for connecting saiddeltaconnected capacitors in shunt with said inductance means betweensaid inductance means and said output means, a plurality of controllableswitching means each having first and second power terminals and acontrol terminal, means for connecting the first power terminals ofpredetermined ones of said switching means to respective junctions ofsaid delta-connected capacitors, means for connecting the second powerterminals of predetermined other ones of said switching means to saidrespective junctions of said delta-connected capacitors, firstconnecting means for connecting together the second power terminals ofsaid predetermined ones of said switching means, second connecting meansfor connecting together the first power terminals of said predeterminedother ones of said switching means, discharge inductance means, meansfor connecting said discharge inductance means between said first andsecond connecting means, means for energizing the control terminals ofsaid switching means in a predetermined sequence to generatemulti-stepped regulating waves across said delta-connected capacitors,and means for advancing and retarding the application of energizingsignals to the control terminals of said switching means in accordancewith the voltage at said output means.

12. A regulating circuit as set forth in claim 11 in which said outputmeans includes clamping capacitance means, rectifying means having a-cinput terminals and d-c output terminals, means for connecting said a-cinput terminals to saidregulating inductance means and means forconnecting said clamping capacitance means across said d-c outputterminals.

13. A regulating circuit as set forth in claim 11 in which said meansfor connecting said delta-connected capacitors in shunt with saidregulating inductance means includes a transformer having at least oneset of Wye-connected windings.

1. In a regulating circuit utilizing a regulating wave of controlledharmonic content, in combination, polyphase input means, output means,series regulating means, means for connecting said series regulatingmeans between said polyphase input means and said output means, aplurality of charge storage means, means for connecting said storagemeans to one another, means for applying the voltages across saidstorage means to said series regulating means between said seriesregulating means and said output means, a plurality of inductance means,controllable switching means for connecting said inductance means topredetermined ones of said charge storage means to initiateredistributions of charge among said storage means, sensing means forgenerating a signal having a frequency which varies in accordance withthe voltage at said output means and having a quiescent frequency whichis at least three times greater than the frequency of the voltage atsaid input means, signal translating means for applying firing signalsto said controllable conducting means in a predetermined sequence at arepetition rate determined by the frequency of the signals generated bysaid sensing means, means for connecting said sensing means to saidoutput means and means for connecting said signal translating means tosaid sensing means and to said controllable switching means.
 2. Aregulating circuit as set forth in claim 1 in which said output meansincludes clamping capacitance means, rectifying means having a-c inputterminals and d-c output terminals, means for connecting said a-c inputterminals to said series regulating means and means for connecting saidclamping capacitance means across said d-c output terminals.
 3. In aregulating circuit utilzing a regulating wave of controlled harmoniccontent, in combination, a-c input means, output means, regulatinginductance means, means for connecting said regulating inductance meansbetween said a-c input means and said output means, a plurality ofcapacitors, means for connecting said capacitors to one another and inshunt with said regulating inductance means between said inductancemeans and said output means, discharge inductance means, controllableswitching means, means for connecting said discharge inductance meansand said controllable switching means to said capacitors to afford aplurality of selectable resonant current flow paths therebetween, meansfor energizing said controllable switching means in a predetermined,periodic sequence to redistribute charge among said capacitors in amultiplicity of discrete steps and means for controlling the frequencyof the energization of said controllable switching means in accordancewith the voltage at said output means.
 4. A regulating circuit as setforth in claim 3 in which a d-c voltage is produced at said output meansand in which each redistribution of charge among said capacitors is madeto occur within a time interval which is short in relation to the periodof the input voltage.
 5. In a regulating cirCuit utilizing a regulatingwave of controlled harmonic content, in combination, a-c input means,output means, regulating inductance means, means for connecting saidregulating inductance means between said a-c input means and said outputmeans, a plurality of capacitors, means for connecting said capacitorsin a delta configuration, means for connecting said delta-connectedcapacitors in shunt with said inductance means between said inductancemeans and said output means, discharge inductance means, a plurality ofcontrollable switching means, means for connecting said dischargeinductance means and said switching means to said delta-connectedcapacitors to initiate and terminate reversals in the polarity of thecharge on said capacitors, means for energizing said controllableswitching means in a predetermined sequence to generate across saiddelta-connected capacitors a plurality of multi-stepped regulatingwaves, and means for advancing and retarding the conduction times ofsaid switching means in accordance with the voltage at said outputmeans.
 6. A regulating circuit as set forth in claim 5 in which saidoutput means includes clamping capacitance means, rectifying meanshaving a-c input terminals and d-c output terminals, means forconnecting said a-c input terminals to said regulating inductance meansand means for connecting said clamping capacitance means across said d-coutput terminals.
 7. A regulating circuit as set forth in claim 6 inwhich reversals in the polarity of the charge on said capacitors aremade to occur within time intervals which are short in relation to theperiod of the a-c input voltage.
 8. A regulating circuit as set forth inclaim 5 in which said means for connecting said delta-connectedcapacitors in shunt with said inductance means includes a transformerhaving at least one set of Wye-connected windings.
 9. In a regulatingcircuit utilizing a regulating wave of controlled harmonic content, incombination, a-c input means, output means, regulating inductance means,means for connecting said regulating inductance means between said a-cinput means and said output means, a plurality of capacitors, means forconnecting said capacitors in a star configuration, means for connectingsaid star-connected capacitors in shunt with said inductance meansbetween said inductance means and said output means, dischargeinductance means, a plurality of controllable switching means, means forconnecting said discharge inductance means and said switching means tosaid capacitors to initiate and terminate the resonant transfer ofcharge from a charged capacitor to an uncharged capacitor, means forenergizing said controllable switching means in a predetermined sequenceto generate across said star-connected capacitors a plurality ofmulti-stepped regulating waves, and means for advancing and retardingthe firing times of said controllable switching means in accordance withthe voltage at said output means.
 10. A regulating circuit as set forthin claim 9 in which said output means includes clamping capacitancemeans, rectifying means having a-c input terminals and d-c outputterminals, means for connecting said a-c input terminals to saidregulating inductance means and means for connecting said clampingcapacitance means across said d-c output terminals.
 11. In a regulatingcircuit utilizing a regulating wave of controlled harmonic content, incombination, a-c input means, output means, a plurality of regulatinginductance means, means for connecting said regulating inductance meansbetween said a-c input means and said output means, a plurality ofcapacitors, means for connecting said capacitors to one another in adelta configuration, means for connecting said delta-connectedcapacitors in shunt with said inductance means between said inductancemeans and said output means, a plurality of controllable switching meanseach having first and second power terminals and a control terminal,means for connecting the first power terminals of predetermIned ones ofsaid switching means to respective junctions of said delta-connectedcapacitors, means for connecting the second power terminals ofpredetermined other ones of said switching means to said respectivejunctions of said delta-connected capacitors, first connecting means forconnecting together the second power terminals of said predeterminedones of said switching means, second connecting means for connectingtogether the first power terminals of said predetermined other ones ofsaid switching means, discharge inductance means, means for connectingsaid discharge inductance means between said first and second connectingmeans, means for energizing the control terminals of said switchingmeans in a predetermined sequence to generate multi-stepped regulatingwaves across said delta-connected capacitors, and means for advancingand retarding the application of energizing signals to the controlterminals of said switching means in accordance with the voltage at saidoutput means.
 12. A regulating circuit as set forth in claim 11 in whichsaid output means includes clamping capacitance means, rectifying meanshaving a-c input terminals and d-c output terminals, means forconnecting said a-c input terminals to said regulating inductance meansand means for connecting said clamping capacitance means across said d-coutput terminals.
 13. A regulating circuit as set forth in claim 11 inwhich said means for connecting said delta-connected capacitors in shuntwith said regulating inductance means includes a transformer having atleast one set of Wye-connected windings.